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| 8-Pin N-FET Linear Regulator Controller POWER MANAGEMENT Description The SC4210A linear regulator controller includes all the features required for an extremely low dropout linear regulator that uses an external N-channel MOSFET as the pass transistor. The device can operate from input voltages as low as 1.75V and can provide high current levels, thus providing an efficient linear solution for custom processor voltages, bus termination voltages, and other logic level voltages down to 0.5V. The onboard charge pump creates a gate drive voltage capable of driving an external N-MOSFET which is optimal for low dropout voltage and high efficiency. The wide versatility of this IC allows the user to optimize the setting of both current limit and output voltage for applications beyond or between standard 3-terminal linear regulator ranges. The 8-pin controller IC features a duty ratio current limiting technique that provides peak transient loading capability while limiting the average power dissipation of the pass transistor during fault conditions. The SC4210A is available in an MSOP-8 surface mount package. SC4210A Features On-board charge pump to drive external N-MOSFET Input voltage as low as 1.75V to 5.5V Duty ratio mode over-current protection Extremely low dropout voltage Low external parts count Output voltages as low as 0.5V MSOP-8 package Applications Telecom and networking cards Industrial applications Wireless infrastructure Set-top boxes Post regulated power supplies Typical Application Circuit R1 0.015 Vin = 3.3V C1 22F 1 C2 0.01 2 VDD CS 8 CAP CT 7 C3 0.01 3 GND FB 6 C5 0.1 Q1 FDB7030BL 4 COMP VOUT 5 Vout = 1.8V @ 6Ap-k R3 39k R4 1.30k C6 0.01 C7opt. 10F R2 24k C4 150pF U1 SC4210A R5 499 Revision: October 26, 2004 1 www.semtech.com SC4210A POWER MANAGEMENT Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability. Parameter CAP, COMP, VOUT CT, FB, VDD, CS Junction Temperature Range Storage Temperature Range Lead Temperature (Soldering) 10 sec Thermal Impedance Junction to Ambient Symbol Limits -0.3 to +12 -0.3 to +6 Units V V C C C C/W TJ TSTG TLEAD J A -40 to +125 -65 to +150 300 207 Electrical Characteristics Unless specified: TJ = TA = -40 to 125C, VDD = 1.8V to 5V, C = 10nF, C T CAP = 100nF. Parameter Input Supply Supply Current Under Voltage Lockout Minimum Voltage to Start Hysteresis Reference VREF Symbol Conditions Min Typ Max Units V D D = 5V 2.0 2.8 mA 1.728 90 1.764 V mV VDD = 3.3V, TJ = 25C VDD = 3.3V, TJ = -40C to +125C 495 488 500 505 512 mV mV Current Sense Comparator Threshold Amplifier Threshold Input Bias Current 100 140 0.5 0.8 mV mV A 2004 Semtech Corp. 2 www.semtech.com SC4210A POWER MANAGEMENT Electrical Characteristics Unless specified: TJ = TA = -40 to 125C, VDD = 1.8V to 5V, C = 10nF, C T CAP = 100nF. Parameter Current Fault Timer CT Charge Current CT Discharge Current CT Fault Low Threshold CT Fault High Threshold Fault Duty Cycle Error Amplifier Input Bias Current Open Loop Gain Transconductance Output Impedance Unity Gain Crossover Source Current Sink Current FET Driver Peak Output Current Average Output Current Max Output Voltage Charge Pump CAP Voltage Symbol Conditions Min Typ Max Units VCT = 1V, VDD = 5V VCT = 1V, VDD = 5V 20 0.8 40 1.7 0.3 1.3 60 3.0 A A V V 2.8 4 5.2 % 0.2 66 -10A to 10A, VDD = 5V 0.6 0.8 2.6 GBW V D D = 5V V D D = 5V 30 20 5 55 45 0.5 A dB mS M MHz A A VCAP = 10V, VOUT = 1V VOUT = 1V, VDD = 5V VDD = 4.5V, ICAP = 10A 0.7 200 8 2 330 8.4 mA A V VDD = 4.5V, CS = 0V 8.5 9.4 Note: (1) This device is ESD sensitive. Use of standard ESD handling precautions is required. 2004 Semtech Corp. 3 www.semtech.com SC4210A POWER MANAGEMENT Pin Configuration TOP VIEW VDD CAP GND COMP 1 2 3 4 8 7 6 5 CS CT FB VOUT Ordering Information Part Number (1) SC4210AIMSTRT(2) S C 4210A E V B P ackag e MSOP-8 EVALUATION BOARD Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. (MSOP-8) Pin Descriptions Pin 1 2 Pin Name VD D C AP Pin Function The system input voltage is connected to this point. VDD must be above 1.75V. VDD also acts as one side of the current sense amplifier and comparator. The output of the charge pump circuit. A capacitor is connected between this pin and GND to provide a floating bias voltage for an N-Channel MOSFET gate drive. A minimum of a 0.01F ceramic capacitor is recommended. CAP can be directly connected to an external regulated source, in which case the external voltage will be the source for driving the N-Channel MOSFET. Ground reference for device. The common output of the transconductance error amplifier and current sense amplifier. It is used for compensating the small signal characteristics of the voltage and current loop (when the current sense amplifier is active in over-current mode). Also, it can be utilized as an ON/OFF node; if pulled to GND the circuit will shutdown; if left floating, it will enable normal operation. This pin directly drives the gate of the external N-MOSFET pass element. The typical output impedance of this pin is 2.5k The inverting terminal of the voltage error amplifier; used to feedback the output voltage for comparison with the internal reference voltage. The input to the duty cycle timer circuit. A capacitor is connected from this pin to GND, setting the maximum ON time of the over-current protection circuits. The negative current sense input signal. This pin should be connected through a low noise path to the low side of the current sense resistor. 3 4 GND COMP 5 6 7 8 VOUT FB CT CS 2004 Semtech Corp. 4 www.semtech.com SC4210A POWER MANAGEMENT Block Diagram Control Loop Block Diagram Figure 1. 2004 Semtech Corp. 5 www.semtech.com SC4210A POWER MANAGEMENT Applications Information Basic Operation Topology The SC4210A incorporates a charge pump which multiplies the input supply by a factor of approximately three. This charge pump output, or the CAP pin, should be bypassed to GND in order to reduce high frequency ripple - capacitor value isn't critical. The amplified voltage supplies power to both the output stage of the error amplifier and the bipolar buffer transistor which provides the gate potential to the external N-MOSFET. The error amplifier is a transconductance type with a transconductance of around 0.8mSTYP. The open loop voltage gain is about 66dB. The output of the E/A is compensated externally through the COMP pin with an RC series network. The OUT pin is a buffered version of the COMP pin with approximately 2.5k output drive impedance. Overcurrent protection is accomplished by measuring the voltage potential between the input supply, pin VDD, and the connection of the external sense resistor and drain terminal of the external N-MOSFET at pin CS. If the potential difference between the CS and VDD exceeds 100mV for a time greater than the value determined by formula (1) below, the device will enter a 4% maximum on-time until the overcurrent condition is removed. T delay ILIM = 140mV / R SENSE The SC4210A incorporates a UVLO rising threshold of 1.73VTYP with 90mV hysteresis. Stability and Transient Performance The SC4210A topology allows the device to be configured to have both a stable performance across a wide frequency range as well as react quickly to and recover from transients at the output load. Experimental and simulated results have shown that the device performs well under the following setup conditions: Rcomp = 24k; Ccomp = 150pF COUT = 10uF, tantalum, ESR = 1-2 Rbleed (R3) = 39k VDD = 3.3V VOUT = 1.8V Iout = 100mA to 6A pulses at SR = 0.3A/s External pass device - FDB7030BL, N-MOSFET The measured ripple voltage is 43mVpk-pk or better than 2.5%; see Figure 2. = C * 0.3V / 36A (1), T where CT is the capacitor at the CT pin. The above applies to the initial overcurrent condition, after which if the overcurrent condition remains in effect, the device will repeatedly cycle on and off according to the following formulas: T ON = C *1V / 36A T (2) (3) Figure 2. T OFF = C * 1V / 1.6A T During the Gate on-time, the maximum current the pass device may supply is limited to: 2004 Semtech Corp. 6 www.semtech.com SC4210A POWER MANAGEMENT Applications Information (Cont.) Using the above values with a constant 3A load gives 80 PM (phase margin) with a unity gain frequency of 2.4MHz; see Figure 3, simulated in P-Spice. ZL : = 1 + Re sr s CL Gs : = RL * ZL RL + ZL 1 RL s CL + Re sr Gs : = 1 RL + + Re sr s CL Hs : = R5 * FS * GS (R4 + R5) Figure 3. Compensating the SC4210A can be done by modeling the device in a straight forward fashion using the Control Loop Block Diagram shown in Figure 1. 1 RC s + RC *CC ZC : = s The basic analysis yields a two pole, two zero system. However, considering a limited bandwidth of the NPN buffer stage and external N-MOSFET, the system eventually rolls off due to the third pole at very high frequencies (10-20MHz). The low ESR ceramic capacitors push the secondary zero to well above the unity gain frequency, requiring accurate placement of the dominant zero for stability. To adjust the above values, say for an output capacitor of 1F ceramic (ESR=1m), the Rcomp initially should be decreased by the same multiple as the output capacitor, i.e. Rcomp = 24k / 10 = 2.4k. Simulated results yield over 90 of PM at a unity gain frequency of 386kHz; see Figure 4. RO : = 0.26 * 107 npn * R3 0.26 * 107 + npn * R3 FS : = gm * Ro * Zc Ro + Zc gm : = 0.8 mA V Fs : = (0.26 * 10 7 ) * (s Rc * Cc + 1)R3 * npn * gm 0.3 * 10 npn * R3 * s Cc + 0.26 * 10 7 * s Rc * Cc + npn * R3 * s Rc * Cc + 0.26 * 10 7 + npn * R3 7 FB : = 2004 Semtech Corp. R5 R 4 + R5 7 www.semtech.com SC4210A POWER MANAGEMENT Applications Information (Cont.) Figure 4. Figure 5 shows the transient response for the circuit described above - the ripple Vpk-pk is almost 60mVpkpk, which is a result of the overdamped system. Figure 6. Figure 7. is an example of how close the actual results can be obtained with the simulation once the correct model has been defined. Below is the P-Spice simulation of the circuit which was built and tested with Ridley instrument; see Figure 6. Figure 5. This circuit can be modified to improve transient performance. This can be achieved by raising Rcomp until the PM decreases to 50-60 at unity gain crossover. This is achieved by raising Rcomp to approximately 5.6k, which gives a PM of 50 at a unity gain of 1MHz; see Figure 6 for the actual circuit Bode plot taken with Ridley Instrument. 2004 Semtech Corp. 8 Figure 7. Again, we achieved a respectable transient response, VOUT_RIPPLE < 50mVpk-pk, less then 3% of the VOUT = 1.8V; see Figure 8. www.semtech.com SC4210A POWER MANAGEMENT Applications Information (Cont.) The pass transistor does add an additional pole to the transfer function. Generally speaking, this parasitic nondominant pole is at frequencies well above the unity gain frequency but should be considered when various types of N-MOSFETs are available. The purpose of the RBLEED is to improve the transient response, reduce overshoot, and to remove an unwanted output ripple voltage if no load is applied to the output. In a practical sense, it is chosen to bleed (drain) about 100A - 150A. The optimum value depends on the input/output voltage ratio and the constraints on the output ripple voltage. Simulation analysis and real life circuit testing have shown very close correlation. Following the procedure described above yields a stable operation and excellent transient response over a wide range of output capacitors: extra low-ESR "ceramics" and "organics", mid-ESR "polymers" and "tantalums", lowcost aluminum capacitors. Below in Table 1 are the summarized results of choosing RCOMP and CCOMP values for the typical application circuit shown on Page 1. Figure 8. An output capacitor is not required for stability. If one is used, compensation is required. Assuming there is no output cap present, only Ccomp will be used. Under this condition, the non-dominant pole and both zero's are pushed well above the unity gain frequency. Using only a Ccomp = 100pF without an output capacitor, the system yields a PM of 78.5 with a unity gain frequency of 387kHz; see Figure 9. VOUT_RIPPLE COUT (F) (mVp-p) 32 53 50 45 46 46 41 55 55 0.1 1 10 10 10 22 33 0 0 ESR ( ) 0.003 - 0.005 0.002 - 0.003 0.001 - 0.002 1-5 10 - 20 5 - 10 0.001 - 0.002 - RCOMP (K) CCOMP (pF) 2.7 2.7 24 24 24 24 82 24 0 33 150 100 100 100 100 150 100 100 Table 1 Figure 9. Test Conditions: VIN = 3.3V, VOUT = 1.8V, IOUT = 6A/0.12A, Sr = 0.3A/s. 2004 Semtech Corp. 9 www.semtech.com SC4210A POWER MANAGEMENT Evaluation Board Circuit R1 * Vin=1.8 to 6V Vin = 1.8V to +5V ** C1 C2 * 1 C3 0.01 2 VDD CS 8 CAP CT 7 C4 0.01 3 GND FB 6 C7 0.1 Q1 FDB7030BL R3 * 4 C5 * COMP VOUT 5 R2 * C6 * Vout=0.5 to Vout > 0.5V 5V R4 * C8 * C9 0.01 U1 SC4210A R5 * * Denotes variable components Evaluation Board Layout and Components Placement 2004 Semtech Corp. 10 www.semtech.com SC4210A POWER MANAGEMENT Outline Drawing - MSOP-8 e/2 A N 2X E/2 PIN 1 INDICATOR ccc C 2X N/2 TIPS 12 e B E1 E D DIM A A1 A2 b c D E1 E e L L1 N 01 aaa bbb ccc DIMENSIONS MILLIMETERS INCHES MIN NOM MAX MIN NOM MAX .043 .000 .006 .030 .037 .009 .015 .009 .003 .114 .118 .122 .114 .118 .122 .193 BSC .026 BSC .016 .024 .032 (.037) 8 0 8 .004 .005 .010 1.10 0.00 0.15 0.75 0.95 0.22 0.38 0.08 0.23 2.90 3.00 3.10 2.90 3.00 3.10 4.90 BSC 0.65 BSC 0.40 0.60 0.80 (.95) 8 0 8 0.10 0.13 0.25 aaa C SEATING PLANE D A2 A GAGE PLANE 0.25 H c C A1 bxN bbb C A-B D L (L1) DETAIL 01 A SIDE VIEW NOTES: 1. SEE DETAIL A CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION AA. Land Pattern - MSOP-8 X DIM (C) G Z C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.161) .098 .026 .016 .063 .224 (4.10) 2.50 0.65 0.40 1.60 5.70 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2004 Semtech Corp. 11 www.semtech.com |
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